cpuid.h 10 KB

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  1. /*===---- cpuid.h - X86 cpu model detection --------------------------------===
  2. *
  3. * Permission is hereby granted, free of charge, to any person obtaining a copy
  4. * of this software and associated documentation files (the "Software"), to deal
  5. * in the Software without restriction, including without limitation the rights
  6. * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
  7. * copies of the Software, and to permit persons to whom the Software is
  8. * furnished to do so, subject to the following conditions:
  9. *
  10. * The above copyright notice and this permission notice shall be included in
  11. * all copies or substantial portions of the Software.
  12. *
  13. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  14. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  15. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
  16. * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  17. * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  18. * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
  19. * THE SOFTWARE.
  20. *
  21. *===-----------------------------------------------------------------------===
  22. */
  23. #if !(__x86_64__ || __i386__)
  24. #error this header is for x86 only
  25. #endif
  26. /* Responses identification request with %eax 0 */
  27. /* AMD: "AuthenticAMD" */
  28. #define signature_AMD_ebx 0x68747541
  29. #define signature_AMD_edx 0x69746e65
  30. #define signature_AMD_ecx 0x444d4163
  31. /* CENTAUR: "CentaurHauls" */
  32. #define signature_CENTAUR_ebx 0x746e6543
  33. #define signature_CENTAUR_edx 0x48727561
  34. #define signature_CENTAUR_ecx 0x736c7561
  35. /* CYRIX: "CyrixInstead" */
  36. #define signature_CYRIX_ebx 0x69727943
  37. #define signature_CYRIX_edx 0x736e4978
  38. #define signature_CYRIX_ecx 0x64616574
  39. /* INTEL: "GenuineIntel" */
  40. #define signature_INTEL_ebx 0x756e6547
  41. #define signature_INTEL_edx 0x49656e69
  42. #define signature_INTEL_ecx 0x6c65746e
  43. /* TM1: "TransmetaCPU" */
  44. #define signature_TM1_ebx 0x6e617254
  45. #define signature_TM1_edx 0x74656d73
  46. #define signature_TM1_ecx 0x55504361
  47. /* TM2: "GenuineTMx86" */
  48. #define signature_TM2_ebx 0x756e6547
  49. #define signature_TM2_edx 0x54656e69
  50. #define signature_TM2_ecx 0x3638784d
  51. /* NSC: "Geode by NSC" */
  52. #define signature_NSC_ebx 0x646f6547
  53. #define signature_NSC_edx 0x43534e20
  54. #define signature_NSC_ecx 0x79622065
  55. /* NEXGEN: "NexGenDriven" */
  56. #define signature_NEXGEN_ebx 0x4778654e
  57. #define signature_NEXGEN_edx 0x72446e65
  58. #define signature_NEXGEN_ecx 0x6e657669
  59. /* RISE: "RiseRiseRise" */
  60. #define signature_RISE_ebx 0x65736952
  61. #define signature_RISE_edx 0x65736952
  62. #define signature_RISE_ecx 0x65736952
  63. /* SIS: "SiS SiS SiS " */
  64. #define signature_SIS_ebx 0x20536953
  65. #define signature_SIS_edx 0x20536953
  66. #define signature_SIS_ecx 0x20536953
  67. /* UMC: "UMC UMC UMC " */
  68. #define signature_UMC_ebx 0x20434d55
  69. #define signature_UMC_edx 0x20434d55
  70. #define signature_UMC_ecx 0x20434d55
  71. /* VIA: "VIA VIA VIA " */
  72. #define signature_VIA_ebx 0x20414956
  73. #define signature_VIA_edx 0x20414956
  74. #define signature_VIA_ecx 0x20414956
  75. /* VORTEX: "Vortex86 SoC" */
  76. #define signature_VORTEX_ebx 0x74726f56
  77. #define signature_VORTEX_edx 0x36387865
  78. #define signature_VORTEX_ecx 0x436f5320
  79. /* Features in %ecx for leaf 1 */
  80. #define bit_SSE3 0x00000001
  81. #define bit_PCLMULQDQ 0x00000002
  82. #define bit_PCLMUL bit_PCLMULQDQ /* for gcc compat */
  83. #define bit_DTES64 0x00000004
  84. #define bit_MONITOR 0x00000008
  85. #define bit_DSCPL 0x00000010
  86. #define bit_VMX 0x00000020
  87. #define bit_SMX 0x00000040
  88. #define bit_EIST 0x00000080
  89. #define bit_TM2 0x00000100
  90. #define bit_SSSE3 0x00000200
  91. #define bit_CNXTID 0x00000400
  92. #define bit_FMA 0x00001000
  93. #define bit_CMPXCHG16B 0x00002000
  94. #define bit_xTPR 0x00004000
  95. #define bit_PDCM 0x00008000
  96. #define bit_PCID 0x00020000
  97. #define bit_DCA 0x00040000
  98. #define bit_SSE41 0x00080000
  99. #define bit_SSE4_1 bit_SSE41 /* for gcc compat */
  100. #define bit_SSE42 0x00100000
  101. #define bit_SSE4_2 bit_SSE42 /* for gcc compat */
  102. #define bit_x2APIC 0x00200000
  103. #define bit_MOVBE 0x00400000
  104. #define bit_POPCNT 0x00800000
  105. #define bit_TSCDeadline 0x01000000
  106. #define bit_AESNI 0x02000000
  107. #define bit_AES bit_AESNI /* for gcc compat */
  108. #define bit_XSAVE 0x04000000
  109. #define bit_OSXSAVE 0x08000000
  110. #define bit_AVX 0x10000000
  111. #define bit_F16C 0x20000000
  112. #define bit_RDRND 0x40000000
  113. /* Features in %edx for leaf 1 */
  114. #define bit_FPU 0x00000001
  115. #define bit_VME 0x00000002
  116. #define bit_DE 0x00000004
  117. #define bit_PSE 0x00000008
  118. #define bit_TSC 0x00000010
  119. #define bit_MSR 0x00000020
  120. #define bit_PAE 0x00000040
  121. #define bit_MCE 0x00000080
  122. #define bit_CX8 0x00000100
  123. #define bit_CMPXCHG8B bit_CX8 /* for gcc compat */
  124. #define bit_APIC 0x00000200
  125. #define bit_SEP 0x00000800
  126. #define bit_MTRR 0x00001000
  127. #define bit_PGE 0x00002000
  128. #define bit_MCA 0x00004000
  129. #define bit_CMOV 0x00008000
  130. #define bit_PAT 0x00010000
  131. #define bit_PSE36 0x00020000
  132. #define bit_PSN 0x00040000
  133. #define bit_CLFSH 0x00080000
  134. #define bit_DS 0x00200000
  135. #define bit_ACPI 0x00400000
  136. #define bit_MMX 0x00800000
  137. #define bit_FXSR 0x01000000
  138. #define bit_FXSAVE bit_FXSR /* for gcc compat */
  139. #define bit_SSE 0x02000000
  140. #define bit_SSE2 0x04000000
  141. #define bit_SS 0x08000000
  142. #define bit_HTT 0x10000000
  143. #define bit_TM 0x20000000
  144. #define bit_PBE 0x80000000
  145. /* Features in %ebx for leaf 7 sub-leaf 0 */
  146. #define bit_FSGSBASE 0x00000001
  147. #define bit_SGX 0x00000004
  148. #define bit_BMI 0x00000008
  149. #define bit_HLE 0x00000010
  150. #define bit_AVX2 0x00000020
  151. #define bit_SMEP 0x00000080
  152. #define bit_BMI2 0x00000100
  153. #define bit_ENH_MOVSB 0x00000200
  154. #define bit_RTM 0x00000800
  155. #define bit_MPX 0x00004000
  156. #define bit_AVX512F 0x00010000
  157. #define bit_AVX512DQ 0x00020000
  158. #define bit_RDSEED 0x00040000
  159. #define bit_ADX 0x00080000
  160. #define bit_AVX512IFMA 0x00200000
  161. #define bit_CLFLUSHOPT 0x00800000
  162. #define bit_CLWB 0x01000000
  163. #define bit_AVX512PF 0x04000000
  164. #define bit_AVX51SER 0x08000000
  165. #define bit_AVX512CD 0x10000000
  166. #define bit_SHA 0x20000000
  167. #define bit_AVX512BW 0x40000000
  168. #define bit_AVX512VL 0x80000000
  169. /* Features in %ecx for leaf 7 sub-leaf 0 */
  170. #define bit_PREFTCHWT1 0x00000001
  171. #define bit_AVX512VBMI 0x00000002
  172. #define bit_PKU 0x00000004
  173. #define bit_OSPKE 0x00000010
  174. #define bit_AVX512VBMI2 0x00000040
  175. #define bit_SHSTK 0x00000080
  176. #define bit_GFNI 0x00000100
  177. #define bit_VAES 0x00000200
  178. #define bit_VPCLMULQDQ 0x00000400
  179. #define bit_AVX512VNNI 0x00000800
  180. #define bit_AVX512BITALG 0x00001000
  181. #define bit_AVX512VPOPCNTDQ 0x00004000
  182. #define bit_RDPID 0x00400000
  183. /* Features in %edx for leaf 7 sub-leaf 0 */
  184. #define bit_AVX5124VNNIW 0x00000004
  185. #define bit_AVX5124FMAPS 0x00000008
  186. #define bit_IBT 0x00100000
  187. /* Features in %eax for leaf 13 sub-leaf 1 */
  188. #define bit_XSAVEOPT 0x00000001
  189. #define bit_XSAVEC 0x00000002
  190. #define bit_XSAVES 0x00000008
  191. /* Features in %ecx for leaf 0x80000001 */
  192. #define bit_LAHF_LM 0x00000001
  193. #define bit_ABM 0x00000020
  194. #define bit_LZCNT bit_ABM /* for gcc compat */
  195. #define bit_SSE4a 0x00000040
  196. #define bit_PRFCHW 0x00000100
  197. #define bit_XOP 0x00000800
  198. #define bit_LWP 0x00008000
  199. #define bit_FMA4 0x00010000
  200. #define bit_TBM 0x00200000
  201. #define bit_MWAITX 0x20000000
  202. /* Features in %edx for leaf 0x80000001 */
  203. #define bit_MMXEXT 0x00400000
  204. #define bit_LM 0x20000000
  205. #define bit_3DNOWP 0x40000000
  206. #define bit_3DNOW 0x80000000
  207. /* Features in %ebx for leaf 0x80000001 */
  208. #define bit_CLZERO 0x00000001
  209. #if __i386__
  210. #define __cpuid(__leaf, __eax, __ebx, __ecx, __edx) \
  211. __asm("cpuid" : "=a"(__eax), "=b" (__ebx), "=c"(__ecx), "=d"(__edx) \
  212. : "0"(__leaf))
  213. #define __cpuid_count(__leaf, __count, __eax, __ebx, __ecx, __edx) \
  214. __asm("cpuid" : "=a"(__eax), "=b" (__ebx), "=c"(__ecx), "=d"(__edx) \
  215. : "0"(__leaf), "2"(__count))
  216. #else
  217. /* x86-64 uses %rbx as the base register, so preserve it. */
  218. #define __cpuid(__leaf, __eax, __ebx, __ecx, __edx) \
  219. __asm(" xchgq %%rbx,%q1\n" \
  220. " cpuid\n" \
  221. " xchgq %%rbx,%q1" \
  222. : "=a"(__eax), "=r" (__ebx), "=c"(__ecx), "=d"(__edx) \
  223. : "0"(__leaf))
  224. #define __cpuid_count(__leaf, __count, __eax, __ebx, __ecx, __edx) \
  225. __asm(" xchgq %%rbx,%q1\n" \
  226. " cpuid\n" \
  227. " xchgq %%rbx,%q1" \
  228. : "=a"(__eax), "=r" (__ebx), "=c"(__ecx), "=d"(__edx) \
  229. : "0"(__leaf), "2"(__count))
  230. #endif
  231. static __inline int __get_cpuid_max (unsigned int __leaf, unsigned int *__sig)
  232. {
  233. unsigned int __eax, __ebx, __ecx, __edx;
  234. #if __i386__
  235. int __cpuid_supported;
  236. __asm(" pushfl\n"
  237. " popl %%eax\n"
  238. " movl %%eax,%%ecx\n"
  239. " xorl $0x00200000,%%eax\n"
  240. " pushl %%eax\n"
  241. " popfl\n"
  242. " pushfl\n"
  243. " popl %%eax\n"
  244. " movl $0,%0\n"
  245. " cmpl %%eax,%%ecx\n"
  246. " je 1f\n"
  247. " movl $1,%0\n"
  248. "1:"
  249. : "=r" (__cpuid_supported) : : "eax", "ecx");
  250. if (!__cpuid_supported)
  251. return 0;
  252. #endif
  253. __cpuid(__leaf, __eax, __ebx, __ecx, __edx);
  254. if (__sig)
  255. *__sig = __ebx;
  256. return __eax;
  257. }
  258. static __inline int __get_cpuid (unsigned int __leaf, unsigned int *__eax,
  259. unsigned int *__ebx, unsigned int *__ecx,
  260. unsigned int *__edx)
  261. {
  262. unsigned int __max_leaf = __get_cpuid_max(__leaf & 0x80000000, 0);
  263. if (__max_leaf == 0 || __max_leaf < __leaf)
  264. return 0;
  265. __cpuid(__leaf, *__eax, *__ebx, *__ecx, *__edx);
  266. return 1;
  267. }
  268. static __inline int __get_cpuid_count (unsigned int __leaf,
  269. unsigned int __subleaf,
  270. unsigned int *__eax, unsigned int *__ebx,
  271. unsigned int *__ecx, unsigned int *__edx)
  272. {
  273. unsigned int __max_leaf = __get_cpuid_max(__leaf & 0x80000000, 0);
  274. if (__max_leaf == 0 || __max_leaf < __leaf)
  275. return 0;
  276. __cpuid_count(__leaf, __subleaf, *__eax, *__ebx, *__ecx, *__edx);
  277. return 1;
  278. }